Question

A data center team is evaluating an NVIDIA Grace CPU Superchip (two Grace CPU dies packaged together) for a memory-bandwidth-intensive data-analytics workload that does not require GPU acceleration. During design review, an engineer asks what interconnect links the two Grace CPU dies within the Superchip and what its primary benefit is. Which statement is accurate?

Accepted Answer

The dies are joined by NVLink-C2C, a coherent chip-to-chip interconnect that provides high bandwidth and a unified memory address space across both dies.

Answer

The dies communicate over a standard PCIe Gen5 root complex, requiring explicit data copies between each die's separate memory pools.

Answer

The dies are linked by InfiniBand NDR, allowing the Superchip to scale across nodes without an external NIC.

Answer

The dies share memory through NVSwitch, the same crossbar used to connect GPUs inside a DGX H100 baseboard.